ELEN4012A · FINAL-YEAR CAPSTONE
Sending data through power lines and light. We’re exploring the bridge between the wiring in a room and a beam from an LED.
POWER LINE COMMUNICATION × VISIBLE LIGHT COMMUNICATION
Existing wires. A small buffer. A different last hop.
THE PROBLEM & OUR APPROACH
Our prototype explores a practical question: can existing power wiring feed a local light-based data link, with a buffer managing the handoff?
PLC brings data through mains wiring to a gateway. An LED then carries the data across a local optical link to a photodiode receiver. Combining them gives us a wired backhaul and a visible-light last hop to study, without running a separate data cable along the PLC path.
PLC can deliver data in bursts or pause under interference. The optical transmitter has its own limited rate. A direct handoff can lose a burst that arrives faster than it can be sent, or leave the light link with nothing to send during a gap.
A finite buffer holds arriving data until the VLC transmitter is ready. It absorbs short bursts and can keep the transmitter supplied through a brief PLC pause, while queued data remains. Pacing and feedback are still needed when input stays faster than output.
Compare a six-packet burst with and without storage. Each step represents a VLC opportunity to send up to two packets; these are teaching units, not measured hardware rates.
Send a burst to see the gateway hold data while the light link sends at its own pace.
0 packets lostA buffer buys time; it does not increase VLC capacity, remove electrical interference, or cover an indefinite outage. Once storage fills, excess input is lost in this model. In the real system, backpressure or retries must be handled by the transport and gateway.
Explore buffer size and interference ↓FROM WALL TO LIGHT
PLC brings the data in. A buffer helps manage the handoff. VLC carries it across the optical link.
PLC adapters use the mains wiring as a communication path. Interference can make delivery uneven.
Queued messages wait at the gateway until the optical transmitter is ready to carry them.
An LED carries the encoded message. A photodiode and receiver electronics turn it back into data.
A CLOSER LOOK
Explore the PLC path and gateway through project illustrations, alongside the actual receiver circuit drawings. Tap any image to inspect it.
Two PLC adapters bridge the router and gateway over existing mains wiring. This is a conceptual layout, not a bench photograph.
The gateway holds incoming data and releases it as the optical transmitter becomes ready. Queue sizes here are illustrative.
The photodiode input stage.
The receiver amplifier stage.
PLC equipment, gateway, LED transmitter, and complete setup photographs are awaiting team contributions.
02 / THE BUFFER CHALLENGE
Protect the image without leaving too much data waiting. Three challenges. One shared scoreboard.
Your nickname and scores appear online after three attempts. Use a nickname rather than contact details.
Practice first, or enter a nickname to play the same calm, busy and harsh challenges as everyone else.
Sample crest: Wits University. Tile removal illustrates missing data; this is not an actual transmission of the crest.
Each attempt starts at 1,000 points. Subtract 20 points per percentage point of data unavailable at 60 seconds, and 100 points per second of peak FIFO queue delay. Scores stop at zero. Your ranked score is the rounded average of all three attempts. Your best complete round per nickname is ranked; earlier-started completed rounds break ties.
Everyone uses the same deterministic traces. The server recalculates results from your buffer choices. Overflow and data still waiting at the deadline count toward missing image tiles. Queue delay is estimated from peak queued data ÷ optical drain rate; a larger empty buffer does not inherently slow the link.
60 model seconds play in about 10 seconds on screen. Teaching rates: source 10 kB/s, PLC bursts 40 kB/s, optical drain 12.5 kB/s. These are not measured project rates. The game never controls the rig.
Loading the shared scoreboard…
| Rank | Nickname | Average | Calm | Busy | Harsh |
|---|
03 / WHAT THE PROJECT TEACHES US
A reusable gateway for IoT: combine two imperfect links, control the handoff, and keep data moving predictably.
Ambient light, distance, alignment and receiver circuit noise affect VLC reception.
A fixed installation lets us control these conditions. Receiver filtering and AC-coupling design can reduce unwanted noise; improvements still need measured validation.
The VLC transmitter reports buffer status. The PLC producer uses that feedback to pace input before the FIFO overflows.
Status reports guide pacing; they are not optical delivery acknowledgements. Detecting corrupted data requires checksums and retries.
Electrical loads can disturb PLC, causing outages or corrupted data. A small FIFO can overflow; a larger queue takes longer to drain.
Size the reserve for measured PLC interruptions under heavy loads: required queued data ≈ VLC drain rate × outage duration. Finite storage cannot cover every outage or repair noise-corrupted packets.
RECORDED TESTS / 12 OCTOBER 2026
Two views from the actual test and dashboard files. Tap the plots to inspect them.
All three source/received pixel comparisons matched on the local USB → light route. Time includes host pacing and receiver feedback.
Download plotted image results
Buffer occupancy from a PLC-labelled gateway dashboard session. The dashed line marks the configured 75% startup/refill threshold.
Download plotted FIFO samplesImage source: text_image_vlc_demo/tests/highres_live_acceptance.json. FIFO source: vlc_150khz_test/dashboard/results/20261012_174423_6c2ab0/metrics.csv, first 120 seconds with reported occupancy. Repeated values may be dashboard snapshots. This is not a controlled outage sweep or proof of a particular throttle policy.
A separate USB-injected FIFO test at 250,000 bit/s queued 85,800 bytes and drained in 3.485 s. The observed receiver sequence span contained 1,525 valid packets and no internal sequence gaps; initial calibration packets were excluded. This was not physical PLC ingress or website-to-rig validation.
The buffer feedback protocol reports used/free space periodically and supports sender pacing. Reserve sizing should be verified against recorded PLC outage durations; these extracts do not establish the worst-case outage. Filtering is a performance option, not a guarantee. These are historical bench results, not live telemetry.
04 / MAKE IT YOURS
Prepare something on your phone, preview what the receiver will see, and explore the transmission journey.
THE PEOPLE BEHIND THE LINK
School of Electrical and Information Engineering
University of the Witwatersrand
SUPERVISOR
POWERLINE COMMUNICATION
VISIBLE LIGHT COMMUNICATION
Team portraits can be added as the project develops.
View the project on GitHub ↗
Internet of Light